Research On Asynchronous Level Crossing Analog To Digital Converter Based On Sparse Signal Processing

With the increasing demand of wireless sensor information acquisition system,the requirement of low power and low complexity design is becoming greater and greater.Due to the limited transmission speed of low power wireless devices,how to reduce the amount of data collected by sensors without distortion is one of the most difficult challenges of the current systems.For sparse signals in time domain,the traditional synchronous sampling method has the disadvantages of more useless signals and higher power consumption,while the asynchronous level crossing sampling method only samples the input signal across the reference level,which can reduce the sparse signal acquisition and system power consumption without distortion of the accuracy.In wireless sensor information acquisition system,analog-to-digital converter(ADC)is the core component.Therefore,this thesis makes an intensive study on the error source modeling,power reduction,and invalid data reduction of ADC acquisition system.The main research contents and achievements are as follows:(1)Aiming at the problem that the time quantization error is equal to the minimum time resolution,which leads to the small signal-to-noise ratio of the system,a new sampling method is proposed to reduce the maximum sampling error quantization.Level crossing analog-to-digital converter is an asynchronous sampled analog-to-digital converter.Compared with traditional synchronous sampled analog-to-digital converter,its sampling is driven by events.Modeling and analysis are helpful to determine the influence of parameters on the conversion results.Therefore,the error sources and timing modes of ADC are comprehensively analyzed at first.Especially on the basis of detailed research on the two main error sources of finite time resolution and finite quantization accuracy,the traditional method of calculating only rising or falling edges is improved,and the two clock edges can be judged automatically.In the nearest one,the maximum quantization error of the sampling time is reduced to TTimer/2,which effectively improves the signal-to-noise ratio of the system.The correctness of the conclusion is verified by modeling and simulation of the level crossing sampling analog-to-digital converter.(2)The comparator is a module of analog-to-digital converter to detect the amplitude of input signal variance.The hysteresis comparator can reduce the impact of noise and fluctuation,but at the same time increase the risk of missing signal spikes.To solve this problem,a new type of hysteresis comparator with dynamic threshold is proposed.Level crossing sampled analog-to-digital converter is mainly aimed at sparse signal acquisition.It is hoped that when the signal is basically unchanged,the invalid data acquisition will be reduced,and when the signal changes rapidly,the peak of the signal can be collected.Hysteresis comparator can reduce the occurrence of errors or unnecessary sampling,but at the same time it may lose the peak of the signal.A time control module is added on the basis of the hysteresis comparator,so that the hysteresis can change dynamically with the change of the output signal,and can be restored to the original set value in a specified time.The effectiveness of the improvement is verified by simulation.The hysteresis comparator has better anti-noise ability when there is no change of the signal,and will not lose the signal peak when the signal changes rapidly.(3)A new multi-channel time-to-digital converter is proposed to measure the time difference between two signals continuously.Timer is an important module in level crossing sampling ADC.It is responsible for quantifying time.Its accuracy directly affects the signal-to-noise ratio of ADC.Most time-to-digital converters can only measure the time interval between two pulses,but can not measure the difference between continuous signals.In order to meet this demand,the research on high-precision time-to-digital converters has been carried out.Multiple identical delay loops are used to lock the time difference of the input signal,and the resolution is determined by the difference between the period of the delay loop and the period of the gated oscillator.The simulation results show that the performance of the circuit meets the needs of the circuit,and the quantization time of the circuit could reach the order of picoseconds.(4)All signals in the level crossing analog-to-digital converter work asynchronously without global clock.In this thesis,a single-channel two-phase static asynchronous pipeline control circuit based on 1-of-N handshake protocol is proposed for communication.After the input signal is sampled asynchronously,it needs asynchronous transmission to reach the register or control the DAC to change the reference voltage.Its asynchronous communication circuit needs an asynchronous pipelined buffer to complete.In the application of this thesis,the asynchronous pipeline controller does not need to return the handshake signal.It only needs to ensure that the asynchronous circuit does not receive new data until the data is processed.Therefore,the forward transmission speed of the asynchronous pipeline controller should be improved as much as possible.Based on this requirement,the asynchronous pipeline buffer circuit proposed in this thesis reduces the time of forward transmission waiting for the response signal,and then reduces the time required on the forward data transmission path,making the circuit more suitable for the structure of this thesis.The effectiveness of the improved algorithm is verified by simulation.(5)According to the low power requirement of level crossing sampled-data converter,a low power bandgap voltage reference structure is proposed.Bandgap reference voltage source is an indispensable module in analog-to-digital conversion,which can provide stable reference voltage and reference current for the circuit.In the absence of sampling,bandgap reference voltage source is one of the few modules with large static power consumption,so how to reduce its power consumption under the premise of ensuring the temperature coefficient is an urgent problem to be solved.Based on the detailed analysis of the power sources of the traditional bandgap reference source,a new structure of substituting common-source cascade current mirror for the traditional amplifier is proposed,which reduces the power consumption of the reference voltage source.At the same time,the output voltage is compensated by the resistance of different temperature coefficients.On the premise of maintaining performance,power consumption is significantly reduced.