Design Of High Resolution Acquisition Circuit

The integrated circuit(IC)tester,as a special test instrument,needs to achieve a higher index than the device under test(DUT)in order to be able to test these chips.In order to observe and measure the small amplitude analog signals output by integrated circuits such as high-speed digital-to-analog converter(DAC),a high-speed,highresolution,high signal-to-noise ratio acquisition system is required.At present,the data acquisition system composed of available analog-to-digital converter(ADC)chips is increasingly unable to meet the needs of integrated circuit testing.This subject was born,mainly using the existing ADC to build a high-speed high-resolution acquisition circuit.This subject uses TIADC(Time-interleaved ADC,time alternating sampling analogto-digital conversion)technology to improve the sampling rate of the analog-to-digital conversion circuit,analyzes the noise in the circuit,studies the impact of digital postprocessing methods on improving the quality of the acquired waveform,and tests it to verify.The main research contents of this thesis include:(1)The overall scheme design of the acquisition circuit.The research focuses on the hardware system design of the acquisition circuit,and introduces the various components of the acquisition circuit,and illustrates the important role played by the key circuits in achieving the subject indicators.(2)Hardware circuit design and implementation.The composition structure of the analog front-end is described,and a low-noise signal conditioning channel is analyzed in detail.The noise level of the signal conditioning channel was evaluated by means of noise model analysis.At the same time,the jitter theory of the sampling clock is discussed.The adjustable phase delay method is used to realize the low jitter delay.(3)In view of the inconsistencies between the characteristics of multiple ADCs,theoretically establish an error model of the time-sampling sampling system,and analyze the effects of the offset error,gain error,and time error on the acquisition system.On this basis,three error estimation methods are studied.Finally,an error correction method based on the combination of hardware and software is used to correct the amplitude and time non-uniformity of the alternating time sampling system to further improve the signal-to-noise ratio of the acquisition and meet the requirements of the system index.The high-speed and high-resolution acquisition circuit of this subject can achieve the indicators of 16-bit resolution and 1G sampling rate.The quality of the acquired waveform is improved after the system error calibration process,which can reach 62.85 dB and the effective number of bit reach 10.15 bits.The validity of the proposed interpolation-based calibration method is proved by the testing of the index.