Research And Implementation Of High-speed Data Acquisition Technology Based On The Time-interleaved

Data acquisition system is widely used in electronic communications equipment,test and measurement technology and instruments with radar and other electronic systems.As the electronic technology,communication technology and the rapid development of computer technology,the measured quantities of real-time signal processing of the requirement of increasing the speed and accuracy,but also on the speed and precision of data acquisition equipment put forward higher requirements.ADC(Analog-to-Digital Converter),the sampling rate and resolution of directly determine the sampling speed and precision of the data acquisition system.However,due to the limitation of integrated circuit technology,single chip ADC sampling technology cannot meet the high speed while maintaining high accuracy of signal collection,just rely on monolithic ADC already cannot satisfy the development requirements of the high-speed data acquisition technology.Time-interleaved sampling technology is put forward has become one of the most effective solution to solve this problem,effective breakthrough monolithic ADC can't improve the bottleneck of sampling rate and resolution at the same Time,realize high speed and high precision data acquisition.Using time alternating sampling ADC system called TIADC system technology.Although TIADC system in the sampling accuracy unchanged at the same time improve the sampling speed,but as a result of chip ADC performance difference,the sampling interval between heterogeneous factors brought including time error,gain and offset error of channel mismatch errors.These errors will result in the time domain waveform distortion,the introduction of spectrum aliasing,reduce the SNR of the system and affecting the precision of sampling signal reconstruction and analysis.In this article,through analyzing the principle of TIADC system and channel mismatch error characteristics,using the Matlab software to its mathematical modeling and analysis of channel mismatch error sources and estimation and correction method.By designing analog signal input module,clock module,the four pieces of alternating sampling ADC chip in time,the FPGA is responsible for the system logic control and several drama after receiving cache uploaded to PC for data analysis,has realized the 12 bit,400 Msps installed base of high-speed data acquisition system and the error estimation and correction algorithm of the collected data to estimate the error,and correction.Finally,system simulation and test results show that the system normal function of data acquisition,error correction algorithm of the burr noise filter in addition to the time domain waveform and spectrum of harmonic distortion,at the same time improve the system dynamic parameters,to verify the effectiveness of the design and the applicability of the algorithm...