Techniques For High-Resolution SAR ADCs

Analog-to-Digital Converter(ADC),which serves as a bridge between the physical world and digital circuits,plays a key role in the very large-scale integrated circuits.With the development of wireless network communication,medical imaging,industrial automation and consumer electronics,digitization of analog signals with higher resolution and better linearity is in significant demand.The architecture of conventional high-resolution ADCs is usually ‘pipline' or ‘oversampling'.However,the power efficiency of successive apporoximation register(SAR)ADCs,which benefits significantly from advanced CMOS technologies,is gradually improved and thus a higher figure of merit(FoM)has been achieved.Furthermore,pipeline delay and oversampling decimation filter delays make it unsuitable for applications that require fast response,such as industrial automation.Therefore,the design of high-resolution Nyquist SAR ADCs has been a topic of extensive research in recent years.This thesis presents a 14-bit 4-MS/s voltage-controlled oscillator(VCO)based successive approximation register(SAR)analog-to-digital converter(ADC),where the metastability of VCO-based comparator is exploited for the background calibration of mismatch errors.A closed-form behavioral analysis of VCO-based comparators has been studied in the presence of noise,showing the metastability is of unique characteristics as compared to voltage-domain comparators,and the metastability depth can be evaluated by the number of oscillation cycles(NOC).Capacitor mismatch dominates the ADC errors in deep metastability,based on which an analog background calibration technique is proposed.A decision stabilizer is employed to relax the constraints due to the limit cycle oscillations(LCO).Fabricated in a 40-nm CMOS technology,the ADC prototype exhibits peak signalto-noise-and-distortion ratio(SNDR)of 78.7 dB and >92 dB spurious-free dynamic range(SFDR)over 9 samples.At 2 MS/s and 4 MS/s,the ADC including calibration logic consumes only 94 ?W and 157 ?W from a 1.1V supply,achieving a peak Schreier figure of merit(FoM)of 179.0 dB and 177.7 dB,respectively.