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Research On ESD Full Chip Protection Device Based On 0.6?m CMOS Process

Posted on:2020-03-20Degree:MasterType:Thesis
Country:ChinaCandidate:G HeFull Text:PDF
GTID:2428330596476364Subject:Engineering
Abstract/Summary:PDF Full Text Request
Electrostatic discharge(ESD)is a common natural phenomenon in life,which can cause damage or burnout of integrated circuits,metal wire fusing,and gate oxide breakdown.It causes serious damage to integrated circuit products and makes them reliable.Greatly reduced.Based on the 0.6?m CMOS process,this paper designs a protection scheme for forward I/O and bidirectional I/O,which needs to meet the protection requirements of 8KV.This article first introduces the basic theory of ESD protection.Three basic models of ESD are pointed out: human body model(HBM),machine model(MM),and component charging model(CDM).Three ESD models and TLP test methods are described.Next,the conventional ESD single device under CMOS technology is introduced.The protection principle,application range,advantages and disadvantages of basic ESD devices such as diode,MOSFET and SCR are introduced.Then typical circuits based on the input and output ports of the 0.6?m CMOS process define the design window and protection specifications for unidirectional I/O and bidirectional I/O.For the one-chip I/O full-chip protection scheme,the single devices are mainly diodes,GGNMOS/GDPMOS,GCNMOS/GCPMOS,resistor-assisted GGNMOS/GDPMOS,LVTSCR,and resistor-assisted LVTSCR.For full-chip protection schemes for bidirectional I/O,the single devices are primarily back-to-back diodes and bidirectional MLSCR.Finally,the single device in the full-chip solution in the 0.6?m CMOS process is introduced.For forward I/O protection,the design window of 5.5V-11.7V is determined by analyzing the protected circuit,and based on the experience of the first streaming scheme,the layout structure and parameters of devices such as GGNMOS and LVTSCR are performed.Adjustment.Based on the existing data,in order to improve the trigger voltage,the RC circuit assisted triggering GCNMOS and the resistor-assisted triggering LVTSCR are designed.For Power Clamp devices,in order to achieve protection requirements,while minimizing the layout area,focus on resistance,capacitance,and inverter.For ESD protection of bidirectional I/O,the back-to-back diodes used in the process are used and a bidirectional MLSCR device is designed for protection.
Keywords/Search Tags:ESD, Power Clamp, Low-trigger voltage SCR, Full chip ESD protection
PDF Full Text Request
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