The Research Of ESD Protection Design Using GCMOS 4KV Full-chip Technology

With the Process dimension of CMO S(Complementary Metal Oxide Semiconductor)technology shrinking,the device ability of ESD(Electronstatic Discharge)resistant is getting more and more low,and the failure of integrated circuit every year due to ESD has become more serious.The research of how to effectively improve the ESD protection film on chip has become an important subject of integrated circuit.This paper has completed the research on the design scheme that based on A mixed-signal DSP(Digital Signal Processor)chip.This article has carried on the detailed analysis in terms of the system level and circuit level of whole chip ESD protection principle,and common ESD protection unit circuit,and proposed the main points of the whole chip ESD protection design.According to the Power supply domain?port type characteristics and chip size of the DSP chip,This article has put forward a system level solution of the whole chip ESD protection design based on ESD BUS,and according to the scheme of system level,completed the design of ESD protective circuit based on new GCMOS ESD protection circuit and the Clamp circuit between Power and Ground.Finally,according to the design of ESD map layout characteristics,and considering problems of the latch effect of port?hot and cold trap leakage,this paper completed the design of the whole chip ESD protection layout on the DSP chip under the CSMC HJ018 process and tested the ESD level for the new GCMOS ESD protection circuit and the whole chip proction system,and through the TLP test system,verify the validity of the design.According to the result of the TLP test instrument test,the new GCMOS ESD protection circuit has the following characteristics:trigger voltage is about 8 v,the secondary breakdown current is 3.7 A,equivalent HBM voltage is 5.55 KV,the equivalent conduction resistance to 3 2.The whole chip TLP test results of three groups of different physical location port:the neighboring port?the far away from the adjacent angle port and the furthest diagonal port in the physical location display that the secondary breakdown current of three groups of ports over 3A,equivalent HBM pressure more than 4.5 KV has reached 4 KV military standard.