FPGA-based SEE Soft Error Evaluation Method For Microprocessor

With the continuous development of semiconductor technology,microprocessor chips have smaller feature sizes,lower operating voltages and higher clock frequencies.Though higher integration degree can result in stronger performance and smaller chip size of microprocessor chips and richer application scenarios,it also makes microprocessors more sensitive to particle radiation,electromagnetic interference,voltage disturbance and other factors.What is more,in some critical missions related to aerospace,microprocessor chips are easily impacted by various energy particles in space radiation environment,which seriously affect the liability of microprocessors.Traditional evaluation technology mainly focuses on single event upset occurred in memory units.Recent researches show that as the clock frequency continues to increase and the feature size continues to decrease,the single Event Ransient occupies an increasingly important position.Fault injection,as an effective,flexible and convenient method,has attracted wide attentions from researchers of soft error sensitivity evaluation fields,but there are also many shortcomings.To conduct sensitivity evaluation of soft errors automatically and rapidly,this paper researches on the method of FPGA fault injection.Firstly,the internal structure,working principle,development environment and development process of FPGA were simply introduced.The modularization method is then adopted to design PIC16F54 microprocessor,and this design is applied and verified by FPGA.Secondly,a SEU soft error sensitivity evaluation method of microprocessors based on FPGA was proposed.A normal microprocessor and a golden one are operated synchronously on FPGA chips.Besides,the parallelism of FPGA is also fully used to present fault injection control,fault classification,fault list and other modules on the hardware,which helps to realize SEU fault injection automatically and rapidly.This method,however,is not available to SET fault pulse injection,making it unable to evaluate SET soft error sensitivity of microprocessor.In order to quickly and accurately evaluate SET soft error sensitivity of microprocessor,an improved soft error sensitivity evaluation method based on FPGA fault injection was proposed.By analyzing the microprocessor gate-level netlist and timing constraints file,the SET fault injection location and the transmission delay information were extracted.Besides,the injection of SET fault pulse was realized by using the scan chain and the influences of latch window masking,logic masking and electrical masking on the SET fault pulse propagation were considered.This method was used for fault injection to PIC16F54 microprocessor.Experimental results showed that the time required for fault injection and soft error sensitivity evaluation was improved by about 4 orders of magnitude compared to the ISim software simulation method.