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Research Of The Single-Event Upset Hardened SRAM Cell Based On Bulk CMOS Process

Posted on:2019-01-11Degree:MasterType:Thesis
Country:ChinaCandidate:Z Y ChenFull Text:PDF
GTID:2348330542993903Subject:Circuits and Systems
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With the development of the semiconductor technology,the space radiation effect on integrated circuit devices that used in space is extremely serious.SARM is an important part of IC.It is important to improve the tolerance to radiation for SRAM.As the decreasing of the node capacitance and the supply voltage,Static Random Access Memory(SRAM)is more susceptible to SEU.Adding redundant memory nodes is a common and effective method of the circuit-level reinforcement technique.The structure of Quatro-10T is widely researched due to superior hardening performance.Based on the structure of the Quatro-10T,we propose a novel design of RHEQ(Radiation Harden Enhanced Quatro).The main content of this paper is as follows:(1)We briefly introduce the radiation environment and the effect of ionizing radiation.Then,we introduce several kinds of Single Event Effects(SEE)and the mechanism of charge generation and collection.Finally,we introduce the existing methods of Memory Cell Reinforcement at circuit level.(2)In order to solve the problem of the poor reading and writing stability as well as the slow writing speed of Quatro-10T Cell,we propose a SRAM cell structure of RHEQ.The proposed design can effectively improve the Reading Static Noise Margin(RSNM),Writing Margin(WM),and writing speed.Moreover,due to the stack of transistors inside the cell and the change of circuit topology,the power consumption is reduced.The method of transistor partition is applied in this work,so the area of the RHEQ cell is the same as the Quatro-10T cell.Although the reading speed of the RHEQ cell is decreased,it can be solved by adjusting the size of the access transistors(the trading off between area and speed).On the basis of SMIC 65nm process,the simulation results show that,comparing with the cell structure of Quatro-10T,the RSNM and the WM of the RHEQ cell structure are increased by 51%and 208%respectively,and the writing speed is increased by 45%.Furthermore,the leakage power consumption is reduced by 17%,and the dynamic power consumption is reduced by 76%.However,the reading speed is reduced by 43%.(3)We analyze the vulnerability to SEE of each node of Quatro-IOT and RHEQ SRAM memory cells.We discover the most vulnerable storage node of the cell.For the PMOS connected with the most vulnerable storage nodes in the RHEQ cell structure,the source isolation technique can be used in the layout to reduce the charge collection at the drain if it is hit by high energy particles.It can reduce the probability of SEU.Meanwhile,we just discussed the SEE on a single node in a cell and the Single Event Multi-Node Upsets(SEMNUs)caused by charge sharing effect between PMOSs.In this paper,Sentaurus TCAD is used to anlayzing the radiation resistance of the RHEQ cell and the Quatro-10T cell.The simulation results show that,when the value of the Linear Energy Transfer(LET)is 80 MeV-cm2/mg,the RHEQ cell can still immune the SEMNUs,but the upset threshold of Quatro-10T cell structure is just between 1.3 MeV-cm2/mg and 1.4MeV-cm2/mg.Furthermore,as for the Quatro-10T cell,there is a node that is susceptible to the SEU,but any node of the RHEQ cell can immune the SEU thoroughly.Therefore,the cell of RHEQ SRAM has better anti-radiation performance than the Quatro-10T.
Keywords/Search Tags:SRAM, Single Event Effects, Single Event Upset, Single Event Multi-Node Upsets
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