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Research And Implementation Of Coarse-grained Reconfigurable Pipelining Co-processor Power Analysis Method

Posted on:2017-11-07Degree:MasterType:Thesis
Country:ChinaCandidate:Q WangFull Text:PDF
GTID:2348330536967638Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Since entering the 21 st century,power has become the main factors restricting the development of VLSI.Estimate power correctly can avoid expensive design changes due to different levels and design stages in VLSI.It can also serve for power optimizing.So power evaluation gets development fast,finally forms two basic of categories called simulation method and probability method.The advantage of simulation is high precision,but the speed is too slow,so it often tastes long time.Probability method has fast speed but the precision is not satisfactory.Later the macro model method based on multiple linear regression comes.It is a power evaluation technology integrated of simulation method and probability method.Macro model balanced the speed and the precision,mainly applied to evaluate the power of network-on chip and memory system in chip,still in developing.This paper focus on the key technologies of macro model method in reconfigurable processor power estimation,based on the requirement of coarse-grained reconfigurable processor structural characteristics and power analysis.Our work has great theoretical significance and practical application value in extending macro model application range and researching new ways of coarse-grained reconfigurable processor power evaluation.The main work and achievement of the paper as below:1? We proposed a power estimation method of reconfigurable processor which based on macro power model considering the structure characteristics of coarse-grained reconfigurable processor.The model is composed of variable and regression coefficient.And the variable must make great impact on reconfigurable processor power.Model variable included structure variable and application variable.They can be sure by analyzing structure characteristics and application computing characteristics of reconfigurable coprocessor.Regression coefficient is computed by simulating gate-level netlist.Regression test result proved model variable to be correct.2? Built a binary linear regression macro power estimation model for reconfigurable switch network which consisted of multiplexers.Data bits and activity are variables of the power model.Other correlative variables like voltage?capacitance?frequency and technology parameter will be considered in simulation stage.Regression test result showed the error between network estimative data and real data is below 10%.It is feasible.3? Analysis the application characteristics of coarse-grained reconfigurable processer based on bone-conduction speech enhancement,built RTL model,create configuration files and simulate.Accomplish the design from RTL to GDSII by synthesis tools and back-end tools,extract gate-level netlist and transition files for computing regression coefficient.4? Built multiple linear regression power macro model of reconfigurable pipeline coprocessor,accomplish to select structure variable and application variable and calculate regression coefficient.Validation results prove that macro power model is variable.Contrast estimation data with simulation data of reconfigurable coprocessor to make sure the model is correct and farther sure our way is doable.
Keywords/Search Tags:Power Analysis, Reconfigurable Pipelining Co-processor, Multiple Linear Regression, Macro Model, Reconfigurable Computing
PDF Full Text Request
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