Design Based On FPGA Of Multi-pointer Elastic Buffer In High-Speed Interface

Elastic buffering technology is widely used in the receiving port of high-speed interface.It ensures the correct transmission of data by the data be inputting and outputting synchronously and compensating the clock deviation.The traditional elastic buffer adds the specific character(SKP)by write pointer jumping and the break point saving.This method is easy to bring complex asynchronous control circuit and resulting in data reception disorders.IN addition,common single pointer elastic buffer must be operated at high frequencies,which would make it easy to create complex timing problems.This dissertation presents a multi-pointer elastic buffer method by analyzing the working principle of the elastic buffer technology.It works by four read and write pointers to reduce the operating frequency.It avoids the appearance of complex asynchronous control circuits by separately adding and.removing operations in different clock domains.This dissertation is organized as follows:(1)Firstly,the working principle and working area of the traditional elastic buffer are introduced.Then,the operation method of read and write pointers when traditional elastic buffers add and removes SKP are analyze.Lastly,a new multi-pointer elastic buffer is proposed for the timing problem brought by this method.(2)Detailed explain the working principle of the multi-pointer elastic buffer and operation method of the read and write pointer.Firstly,the elastic buffer makes use of the input control unit to change the sort of the pair of SKP in the input data and the output control unit to change the output data.Then,the threshold detection unit sends the valid instructions to the read/write pointer control unit by checking whether the amount of effective data in the elastic buffer achieves the threshold which is added or deleted.Lastly,to maintain the elastic buffer in half full state the SKP in data is added or deleted by addressing of four read/write pointers.(3)The simulation software Quartus and Modelism are used to simulate the multi-pointer elastic buffer.And we observe the waveform with a logic analyzer by downloading the program to the FPGA development board.Experimental results show that the design elastic buffer can achieve the function of SKP addition and deletion,and its clock frequency can satisfy the protocol of Universal Serial Bus 3.0.