Design Of Key Blocks In Ultra-Wide Band Frequency Synthesizer

In the high-speed wireless communications field, ultra-wideband (UWB) technology with its ultra-high transmission rate has attractted more and more attention of the academia and industry in recent years. In many standard of UWB technology, multi-band orthogonal frequency-division multiplexing standard (MB-OFDM) obtains more widely recognized in the world. In a UWB communication system, the frequency synthesizer which generates a carrier frequency is still one of the most difficult modules to design in the entire RF transceiver system.Firstly, this paper introduces a comprehensive definition and several common types of frequency synthesizer. It also presents the characteristics of all kinds of frequency synthesizer, and on this basis, some applications about frequency synthesizer are presented. In all these structures, the PLL-type frequency synthesizer is the most important one which includes a phase-frequency detector (PFD), a charge pump (CP), a loop filter (LP), a voltage-controlled oscillator (VCO) and a programmable dividers. This thesis mainly describes the principles of programmable dividers and VCO, and their basic structures, as well as some modified measures.Based on a comprehensive summary and comparison of the characteristics of various types of circuit modules, the programmable integer frequency divider and VCO in UWB frequency synthesizer with TSMC’s 90-nm CMOS process are presented. For programmable integer dividers, the paper gives a specific structure, layout and post-simulation results in accordance with its specifications. The test results show that the design of the programmable integer divider can work well with a 1.2-V supply voltage, the operating current is about 4.2 mA. In the frequency range from 3.1 GHz to 10.6 GHz, its dividing function is right. The phase noise of the output signal is about-118dBc/Hz at 10 kHz offset. In addition, this thesis also presents a UWB ring voltage-controlled oscillator including its topological structure, delay cell circuit, layout and post-simulation results. The test results show that supplied by 1.2 V power, the ring VCO can generate a differential signal from 3.1 GHz to 10.6 GHz with phase noise less than-85 dBc/Hz at 1-MHz offset. Two control voltages also have good linearity from 0.1 V to 0.8 V.Finally, some conclusions are given, especially the problems found in test work and several improvable aspects. The UWB frequency synthesizer is a very complex system which is worth designers to spend more energy to study.