| E-band wireless communication with wideband, fast speed and high security facilitates point-to point data transmission between several kilometers. Thanks to its low cost, high integration and high cut-off frequency with the scaling of the process, silicon-based CMOS is more and more commonly used in millimeter-wave integrated circuit design. Based on 65nm CMOS process, this work presents two E-band (71 76GHz&81-86GHz) frequency synthesizers suitable for ETSI and FCC standards. The results achieved are as follows:1. According to the specs of E-band wireless communication standards, two frequency synthesizers are modeled using Matlab Simulink. The PLL specs and loop filter parameters are designed.2. In order to realize the precise passive components, the inductors and transformers use ADS Momentum tool to extract EM parameters. The S parameters extracted from EM solver are included into circuit and simulate with coordination of "field" and "circuit" to get more accurate simulation results.3. Two VCOs with fundamental frequency output are designed for E-band lower and upper bands. As the inductor model provided by process is accurate only up to 40GHz, an U-shape transmission line inductor is used in VCO tank. The quality factor is 26 at 80GHz. The size of varactors are optimized to get a better trade-off between the tuning range and its quality factor. The quality factor is 24.3 at 80GHz. As the oscillation frequency of mm-wave VCO is quite sensitive to the parasitic capacitance of cross-coupled pair, the size of cross-coupled pair is optimized on current density and finger length to increase the cut-off frequency. As a result, the trade-off between frequency tuning range and startup condition is eased. Buffers use cascode structure to increase gain and improve isolation. In order to evaluate the performance of silicon-based CMOS VCO in 71-91 GHz band more directly, four VCOs for test are designed and their output frequency are 71-76GHz,76-81 GHz, 81-86GHz and 86-91GHz respectively. According to post simulation results, the tuning range of E-band 71-76GHz VCO is 70.97-76.76GHz and the phase noise is-89.47dBc/Hz and-116.2dBc/Hz respectively at 1MHz and 10MHz offset. The power consumption of VCO tank is 10.8mW. The tuning range of 81-86GHz VCO is 80.84-86.82GHz and the phase noise is -87.22dBc/Hz and-114.3dBc/Hz respectively at 1MHz and 10MHz offset. The power consumption of VCO tank is 9.74mW.4. A divider chain which consists of ILFD, dynamic 4:1 CML divider and 7-stage static 2:1 CML divider is designed. The total divide ratio is 1024. NMOS-PMOS direct injection is used in ILFD to improve injection efficiency and two control bits for discrete tuning are added to increase divide range. The divide range is 70-77.5GHz and 80-88GHz separately according to post simulation. The self-oscillation frequency of dynamic 4:1 CML divider can be tuned by adjusting bias voltage, which helps to increase divide range. Post simulation results shows that the divide range is able to cover from 22GHz to 56GHz if bias voltage is tuned from 0.05V to 0.5V.5. Two integer-N frequency synthesizers are designed based on 65nm CMOS process. The post simulation results of 71-76GFz and 81-86GHz PLLs are as follows: total power consumption 244mW and 234.3mW, output frequency range 70.97-76.76GHz and 80.84-86.82GHz, phase noise at 1MHz offset -85.8dBc/Hz and 84.9dBc/Hz, phase noise at 10MHz offset -111.2dBc/Hz and -110.2dBc/Hz, reference spur -46dBc and -47.1dBc respectively. The loop bandwidth and lock time of both PLLs are the same which are 900kHz and 8.8μS respectively.This work is supported by Shanghai Science and Technology Committee,2013 Innovation Action Plan "Millimeter-wave signal source of ultra-high-speed wireless communication system for E-band" under Grant 13511500702. |
PDF Full Text Request