Font Size: a A A

IF Digital Signal Processing Based On FPGA

Posted on:2016-01-20Degree:MasterType:Thesis
Country:ChinaCandidate:M N WangFull Text:PDF
GTID:2308330470478510Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
In recent years, with the progress of science and high-speed development of VLSI, the digital intermediate frequency sampling receiver becomes accessible. The core concept of intermediate frequency receiver is to digitize intermediate frequency signal as far as possible, hence to make the data flow become easier to process for computer or digital signal processor, and then by the programming software.To complete all kinds of algorithm functions, which ensures its good environmental adaptability and extensibility in application.Under the background of current hardware environment and basis of software radio, this paper adopts intermediate frequency digital processing system, and designs a kind of intermediate frequency signal processing scheme based on FPGA. This scheme uses XC4VLX40 of XINLINX as FPGA digital processor chip, making the intermediate frequency signal convert to a digital signal through ADC16V130 chip. After the digital frequency conversion processing, it not only makes the total extraction factor reached 512, but also achieved the intermediate frequency signal processing to base-band signal. At last, it filtered out the noise by using adaptive filtering system to get the original signal. After determining the overall plan, this paper makes a deep investigation of various modules. In the design of NCO, the part of the quadrature mixing unit is accomplished by the advanced CORDIC algorithm. At the same time, this paper controlled peripheral chips by writing SPI bus interface, and guaranteed the hardware platform working. Finally, this paper used the adaptive filter to complete the intermediate frequency signal processing functions.This paper first illustrates the research background and the status of the intermediate frequency receiver; second, it makes the correlative analysis of the influence factors of adaptive filter, including the filter order and algorithm step length. Then it discusses the specific digital frequency conversion structure, including the module design of NCO unit, CIC filter, half-band filter, algorithm implementation of adaptive filter based on FPGA module and the parameter settings of peripheral chips. Finally, it offers the simulation results of these modules, and then makes the program generate the bit-stream file and test it by downloading it into the FPGA hardware platform through the Chipscope software to generate FPGA internal processing design results. The simulation and test results show that the hardware platform works properly, and digital down conversion and adaptive filter test results are correct, which it can meet the requirement of the intermediate frequency signal processing.
Keywords/Search Tags:FPGA, Digital down converter, CORDIC, LMS, SPI
PDF Full Text Request
Related items