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Research Of 4-Channel Variable Decimation Factor Digital Down Converter

Posted on:2018-07-05Degree:MasterType:Thesis
Country:ChinaCandidate:S Z WangFull Text:PDF
GTID:2348330542467185Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
The IF digital receiver is an important part in the digital array radar system,it is an all-digital receiving equipment for data storing and information processing,with high testability,resolution,instantaneous bandwidth and other advantages.As the core component of IF digital receiver,Digital Down Converter(DDC)functions to convert the high-speed IF data into a digital baseband signal,in the condition of keeping the target signal information completely,through decimating and filtering to further slow down the signal rate,and then,the data can be processed by next devices.As a result,the performance of the DDC module directly affects the whole digital receiver system.This paper analyzed the research on key technologies of DDC,and aimed to realize 4-channle,decimation factor variable DDC circuit.The paper mainly includes following parts:First of all,the composition of the digital array radar system is briefly introduced,and the realization mode and the research status at home and abroad of DDC are discussed.The paper lucubrates the relevant basic theories of DDC,including the sampling theory,multi-rate digital signal processing theory,digital orthogonal transformation theory and digital filter theory.Then,the system structure of 4-channel DDC was been designed and the key modules were improved in this paper,including using modified CORDIC algorithm to realize numerically controlled oscillator(NCO)instead of conventional look-up table(LUT)method,the design of multiplier by using a 4 Booth encoder and programmable low-pass filter were presented.The DDC system has advantage of low resource usage,high speed and simple structure.At last,the DDC circuit was verified by FPGA prototype verification technique.Based on SMIC process,the logic synthesis was completed,the maximum area and operating frequency are and 160 MHz.Now,the DDC chip works on a high performance and meets all requirements in the digital array radar system.
Keywords/Search Tags:Digital Down Converter, CORDIC Algorithm, NCO, Low Pass Filter
PDF Full Text Request
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