| This paper introduces the structure of the receiver end of DVB-T system, and discusses the study and design of the Digital Down Converter part. Digital Down Converter is a very important part of this system, it converts the IF signal into baseband, reduces the signal rate and then makes it easy for the later real time DSP operation part. Different from other traditional DDC, the architecture we desgined here can meet the needs of later DDC ASIC implementation.The purpose of this task designs the DDC that is applied to the receiver end of DVB-T system. Firstly, the related theory and algorithm of DDC are introduced. which contants CORDIC,NCO,LUT and interpolator filter. Secondly, using Top-Down design method, The DDC are divided to many function modules and organized to the module library. Meanwhile we simulate the system in Matlab, to check the system feasibility. Finally, the design method and design flow of FPGA are summarized, taking the example of Xilinx's FPGA, and on a basis of it. we use Verilog-HDL to program the system, and implement it in the FPGA chip.In order to integrate DDC as ASIC , the paper not only focuses on realizing perform ance but on optimizing structure as well. In practice, these function modules are selected, configured and optimized to satisfy the system demand. Firstly, based on look-up table (LUT) and Coordinate Rotation Digital Computer (CORDIC) algorithm, a method for implementing a numerically controlled oscillator(NCO) is described in the paper; Secondly, the multiplier optimizing technology-CSD coding, coefficient analyze for direct structure and reduced adder graph for transpose structure, are discussed. Also the optimizing effect is presented with the examples. Thirdly, design a new structure based on the structure of Farrow in the interpolator filter.The last part of the dissertation presents system modeling, and shows the testing results.Which is proved that FPGA implementation can meet design request. |
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