The Design Of A 12 Bit High-accuracy Low-power Current-steering And R-2R Resistor Hybrid DAC

The digital signal processing plays an important role in communication systems, control systems and computer systems. Common digital signal processing hardwards include digital signal processor(DSP), microcontroller(MCU) and microprocessor(MPU). However, the natural signals are analog, and therefore, the interfaces between digital and analog world, digital to analog converter(DAC), has become indispensable. The recent rapid development of mobile handsets has promoted high-accuracy, low-power DAC design.By analyzing and comparing the advantages and disadvantages of the three conventional DAC structure, a 12 bit 10 MHz current-steering and R-2R ladder resistor hybrid DAC is designed in this thesis. The input code of this DAC uses 5+3+4 segmentation; the highest 5 bits are thermometer coding, the middle 3 bits are binary weighted coding, and the lowest 4 bits are interpolated binary coding implemented by R-2R resistor ladder. In this way, the total power consumption is effectively reduced at architectural level. In order to increase the output impedance of current source, cascode structure was used in the current source. Additionally, a pair of PMOS transistors series under the switch to reduce the impact of clock feedthrough. In the layout design, hierarchical symmetric switch are used to eliminate symmetric and gradient errors. Moreover, the synchronous latch and low-crosspoint switch driver circuit are designed to reduce the glitch at output nodes.Both the schematic and layout design was implemented in TSMC 0.18μm Mixed-Siganl 1P6 M CMOS process, and the design was verified using Spectre simulator. Under 1.8 V supply voltage, the differential output voltage swing is ±1.0 V, and the static power consumption is 1.3 m A. The Integral Nonlinearity(INL) is less than 0.15 LSB and the Differential Nonlinearity(DNL) is less than 0.04 LSB. When the input signal is a 300 KHz sinusoid signal, the sampling clock frequency is 10 MHz, the Spurious-Free Dynamic Range(SFDR) is about 68 d B. The test results at direct current domain shows that the DNL is less than 9.5 LSB and the INL is less than 13.5 LSB.