Research On High Reliability And Precision R-2R Digital-to-Analog Converter

Digital-to-analog converter(DAC)is playing an important role in the ever-expanding digital world.Digital-to-analog converter can convert digital input signals into analog output signals and commonly be used to convert the stored digital audios or videos.With the burst development of wireless,digital audio and video,the DAC develops towards the directions of higher speed,higher resolution,lower cost,etc,for adapting the market demands.Currently,DAC already has many different structures,each featuring its own characteristics and limitations.This paper first analyzes the structure of three kinds of DACs:charge sharing DAC,current distribution DAC and voltage distribution DAC.By comparing the advantages and disadvantages of their respective structures,a DAC chip is designed for industrial automatic control by applying the R-2R ladder resistance structure.By analyzing the linearity error of the R-2R ladder DAC,the size and proportion of each switch in R-2R network are obtained.Based on this,the resistance network structure of "5+7" is adopted.In this design,I am mainly responsible for the design of the leaver shifter,the control clock signal generation circuit,the input digital signal(DB)processing circuit,the memory circuit design and the R-2R resistor network.The entire chip includes digital circuit module and analog circuit module,so this design uses a series of Candence software,the design processes are as follows:First,the schematic input,the complete custom layout design,and then the design rules check(DRC),followed by the consistency check of layout versus schematic(LVS),the parasitic parameter extraction,and Circuit Back-End Simulation.In the process of layout design,the device's compatibility and interference isolation are noted The design is based on the CSMC 0.25?m 30V BCD 1P6M process to verify the design of the DAC chip.Specter back-end simulation shows that the integral nonlinear error(INL)and differential nonlinear error(DNL)of DAC are less than 0.46LSB and 0.26LSB at room temperature,respectively.The INL and DNL at-55?125 ? are 0.72 LSB and 0.45LSB respectively,the setup time is 1?s and the conversion speed is 1M,which meet the design requirements of INL 1LSB,DNL 0.5LSB,achieve the chip's high precision and high stability.The design of the DAC chip based on CSMC 0.25?m 30V BCD 1P6M process is validated.