Research And Design Of Σ-△Fractional-N Frequency Synthesizer For UHF RFID Systems

UHF RFID is currently the most widely used non-contact wireless communication technology.The operating frequency is860MHz~960MHz. Frequency synthesizer is one of the most criticalmodules, which can output a stable, integrated and low noise signal of a local oscillator. Itdetermines the performance of the entire radio system and the label reading efficiency of a reader ina complex communication environment.According UHF RFID protocols, the system metrics of the Σ-△Fractional-N FrequencySynthesizer are determined. Sub-modules include a phase frequency detector, a charge pump, a loopfilter, a VCO, a programmable divider, an Σ-△modulator and an automatic frequency calibrationcircuit. The main modules are behavioral modeled by Verilog-A and simulated. The phasefrequency detector with a structure of the edge-triggered D flip-flop, which has a time delay circuit,and no dead zone. The charge pump with a cascode op-amp is a single-ended output type, thesimulation results show that the charge and discharge current remain basically the same within therange of0.25V-1.6V, the mismatch is less than0.3%. The parameters of third-order low-pass filterare calculated based on fourth-order phase-locked loop system. The LC-VCO is the complementarycross-coupled type with a switched capacitor array, the simulation results show that the phase noiseis-98.64dBc/Hz@200kHz and-117.1dBc/Hz@1MHz. The programmable divider can output anydividing ratio stepped by one whose ratio varies from64to127after cascading six dividers, meetthe design requirements, the simulation results show the phase noise is-167.4dBc/Hz@100kHz and-173.1dBc/Hz@1MHz. The structure of Σ-△modulator is single-loop third-order MASH1-1-1.AFC can select the optimal control word of the VCO automatically, the simulation results show thatthe loop can lock properly in the dividing ratio of86to96.The chip size including the entire pad is1425μm×1161μm in0.18μm CMOS process. The looplocking time is less than40μs, when dividing ratio change in the range of86to96. The outputfrequency of four differential quadrature output is860MHz to960MHz. The phase noise is-90.1dBc/Hz@100kHz and-112.3dBc/Hz@1MHz when the output frequency is905MHz. In thecase of the power supply voltage of1.8V, the power consumption of the entire chip is about25mW.