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An Optimized △∑ Fractional-N Synthesizer For UHF RFID Reader

Posted on:2011-12-22Degree:DoctorType:Dissertation
Country:ChinaCandidate:C Q ShiFull Text:PDF
GTID:1118360302964236Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The research and development for reader and tag have grows explosively with the widely using in UHF RFID. It is possible to integrate the reader in single chip with the development of CMOS technology. The study in frequency synthesizer, which is the key module in reader, is very useful.Based on the protocols and spectrum regulations in UHF RFID, an optimized CMOSΔ∑fractional-N frequency synthesizer is designed in UHF RFID reader.Firstly, according to the UHF RFID protocols defined by EPC, ETSI, FCC and China draft, the specification of the frequency synthesizer in reader has been analyzed.Secondly, under the analysis of noise the system parameters such as loop bandwidth, filter parameter, charge-pump current, VCO gain, and divider ratio have been designed. These parameters have been verified by system level simulation.Thirdly, an optimized 3-order 3-bit single loop delta-sigma modulation has been designed by configuring the poles and zeros of the NTF. This DSM has narrow output bit pattern, which improves the PLL in-band noise since the charge pump turn-on time in the locked condition is reduced. The noise of medium frequency offset has been suppressed effectively.Fourthly, noise-filter technique and the high Q spiral inductor have been used to improve the phase noise performance of VCO. On the analysis of spur performance, the schematic and layout have been designed and optimized. The phase noise theΔ∑fractional-N frequency synthesizer is -125dBc/Hz at 1MHz offset from a 1.8GHz carrier and a loop bandwidth of 50 kHz. The rms jitter is 6.74ps and the integrated phase noise is 2.08°from 10kHz to 10MHz frequency offset.Finally, an optimized 3-bit 3rd-orderΔ∑fractional-N frequency synthesizer has been implemented in IBM 0.18μm CMOS process. The measurement results indicate that this design meet the requirement of the UHF RFID reader.The single-chip UHF RFID reader designed by IMCS team has been tested and the measurement shows that the RFID tag can be read correctly within 25cm far from reader with transmit power of 10dBm. Also, the test results show the correctness of thisΔ∑frequency synthesizer.
Keywords/Search Tags:ultra high frequency, RFID, phase-locked loop, frequency synthesizer, charge-pump, delta sigma modulator, VCO, phase noise
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