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Research And Design Of1553B Bus’s Interface Based On SOPC

Posted on:2011-08-23Degree:MasterType:Thesis
Country:ChinaCandidate:X X HuangFull Text:PDF
GTID:2298330452461646Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of the technology of computer andmicroelectronics, the electronic system of automobile becomes more andmore complicated, has more and more function and the shared databetween subsystems also increases. It requires better real-time andreliability. In order to reduce the increasing lines, get better real-time andreliability, cut the cost down and enhance the whole system’s performance,this thesis adopts MIL-STD-1553B bus for the communication inside thecar electronics system. Adopting the bus technology, desiners can reducethe hardware resources (especially the amount of senser), make the designwork easier and get better flexibility of extension. This bus was appliedin avionics, warship and military automobile, and has been used inindustry and commercial projects like beltline and cars.This thesis compares all kinds of solution for implementing theinterface of1553B, analyses and studies the key technology, poses aSOPC solution based on FPGA and embedded Nios II soft IP. This thesisadopts Altera’s FPGA and verilog to encode and decode the manchestercode according with MIL-STD-1553B, establishes SOPC’s hardware andsoftware platform, uses Nios II CPU to control the manchester code’sencoder and decoder to send, receive and store messages. This thesis usesa developing board based on Cyclone II FPGA-EP2C5Q208C8N, whichconcludes1Mb EPCS1,8MB SDRAM,2MB Flash, JTAG, USB, LCD andso on. The Nios II CPU, Manchester code’s encoder, decoder, PLL andother logical modules are implemented on this FPGA platform.Altera’sQuartus II provides consummate SOPC solution. The software isdeveloped in Nios II IDE after establishing the hardware environment.This thesis choses uc/OS-II as RTOS that is customized according to thefeatures of hardware, and combines Nios II CPU’s programming toprocess the signals on the1553B bus, so the function of BC and RT’sinterface is implemented by software.Foreign1553B’s board or AISC is expensive and was restricted in purchasing and employing. If1533B’s related products can be designedby our own, the cost will be cut down effectively and we can get rid ofrestriction by foreign contry. Comparing with solutions based on1553B’sboard, MCU+ASIC and MCU+FPGA, this solution has greater advantagesin cost, integration, system’s volume, consummation and flexibility andcan be prepared for designing1553B interface’s ASIC on our own.
Keywords/Search Tags:SOPC, MIL-STD-1553B, Manchester Code, FPGA, Nios II
PDF Full Text Request
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