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Static Power Reduction Technique In Double-rail MOS Current Mode Logic Circuits

Posted on:2015-02-15Degree:MasterType:Thesis
Country:ChinaCandidate:K Y ZouFull Text:PDF
GTID:2298330422493048Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Power consumption increases exponentially with the rising of operating frequency in the typicalconventional static CMOS logic circuits, which is a major challenge to get a high-speed and low-powerdesign. The Dual-Rail MOS Current Mode Logic (MCML) circuit has features such as wide frequencyband, high-speed, and the power consumption is independent of working frequency, so MCML is widelyused in high-speed circuits. However, the MCML circuits have large static power consumptions due to theirconstant operation currents. This characteristic limits MCML application severely. Therefore, reducing thestatic power consuming of Dual-Rail MCML circuits is meaningful to get a high-speed and low-powerdesign.In this thesis, the source of power consumption in conventional CMOS circuits is reduced along withits reduction methods. Combined with the structure feature of MCML circuits, power reduction techniquessuch as circuit optimization, power-gating and near-threshold are studied. This paper can be divided intothe following parts:1. The source of power consumption in conventional CMOS circuits and techniques to reducing thepower consuming.2. Introduce the working principle of Dual-Rail MCML circuits and the source of power consumption.Besides, MCML basic gates are introduced. They are used as cites to analyzing the parameter restrictions.3. Introduce five power-gating technologies in MCML circuits. Hspice simulations are made topower-gating MCML combinational and sequential circuits. Based on the compare of these power-gatingtechnologies, their features are analyzed. Besides, the comparison between the power-gating MCML andconventional power-gating CMOS logic circuits are made. The results show that the power consuming ofpower-gating MCML circuits has been significantly optimized.4. Introduce the near-threshold technology which used in MCML circuits. Establish the device modelof the near-threshold MCML circuit and analyze the minimum operating voltage. Based on the proper logicfunction of circuit, power consuming of MCML combinational and sequential circuits with variousoperating voltages are made. Besides, layouts of corresponding circuits are drawn. According to the postsimulation results, the accuracy of logic function is verified, and power consuming of near-thresholdMCML circuits have significant reduction compared to conventional MCML circuits.
Keywords/Search Tags:Dual-Rail MOS Current Mode Logic circuit, Static power consumption, Power-gatingtechnology, Near-threshold technology
PDF Full Text Request
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