Research On Low Power Technology Of Analog Circuit And Design Of Rail-to-rail Operation Amplifier

Besides speed and area, power consumption has become another important factor to consider in the design of VLSI. In order to reduce average power consumption effectively, low supply voltage is adopted in CMOS digital circuits. However, low supply voltage brings more challenges to the design of analog integrated circuits.This thesis does research on low-power analog circuit technology based on op-amp as a platform. On the conditions of lower power consumption with 1V supply voltage, to design op-amp with better performance is the focus of this thesis.Rail-to-rail technology is used in the input stage of amplifier. There are many methods to realize rail-to-rail, and the difficulty is to realize constant transconductance. At present, the methods include three-time current mirror, voltage-shift technology, the maximum current selection technology, zener diode technology, and sub-threshold technology. In order to achieve rail-to-rail output, Class AB is used in the output stage. This design adopts feedback AB output stage as the output stage, as it is more suitable for low voltage. The key point is to compromise the efficiency and distortion. At low voltage, this thesis realizes Class AB output, and guarantees the gain of operational amplifier constant and the distortion smaller.The circuits are simulated based on the SMIC 0.18um CMOS process, and the supply voltage is 1V, power consumption lower than 100uW. As the simulation results indicate, the amplifiers do not feature a high gain, a wide bandwidth and a perfect power supply rejection. However, the amplifiers, of which the power consumption is low, less distortion, and high common-mode rejection, achieve aims of the design.Finally, considering power consumption of the system-level, the thesis introduces variable-voltage technology, designing a voltage conversion circuit, and applies it to digital display measurement circuit.