A Study On Frequency Synthesizers Based On Phase-locked Loop

Frequency synthesizer is widely used in wireless communication systems toproduce local oscillation signal for modulation/demodulation and frequencyupconversion/downconversion. The performance of frequency synthesizer has greatimpact on communication system, such as the stability and accuracy of outputfrequency, the frequency step, the phase noise and spur of output signal, and thelocking time.This paper discusses several implementations of frequency synthesizers,architectures of frequency synthesizers, performance parameters of frequencysynthesizers and analysis method for CPPLL of each order, a detailed analysis of theimpact of noise induced by each module on CPPLL. Based on this theory, we designeda868MHz/902~928MHz CPPLL frequency synthesizer used in Zigbee wirelesstransceiver. In this frequency synthesizer, charge pump is implemented using highswing cascode structure, realizing high output impedance while keep high outputswing; VCO used the LC-VCO structure, which can realize low phase noise at highfrequency, in addition, by using4groups of switching capacitors with binary weight, ahigh output frequency range can be realized while maintaining a low Kvco; theprogrammable divider implemented using Pulse-Swallow structure, the prescaler usingcurrent mode logic greatly improves the maximum operation frequency ofprogrammable divider; the loop filter is a3order passive RC filter, which produceslow noise, and the3rdorder of the filter further suppresses the high frequency noise andspur.Based on GSMC0.18μm CMOS process, this circuit is designed and simulatedusing Cadence Spectre/SpectreRF, and the systematic simulation is accomplished byMATLAB/Simulink, layout is completed under Cadence Virtusoo, the chip area of thiscircuit is1.4mm×1.2mm, including PADs. The power voltage is1.8V, the loopbandwidth is about100kHz, phase margin is51°, output frequency range is830MHz~1.125GHz, with orthogonal output available, the frequency step is2MHz, lockingtime is less than50μs, spur level is-60dBc, phase noise is-120dBc/Hz@1MHz frequency offset. The deign of frequency synthesizer meets the requirement of Zigbeetransceiver system.