Standard Cell Library Design Research Based On700V0.5μm Of SOI Technology Platform

Standard cell library is the basic unit of digital integrated circuit design. A set ofspecific process under the condition of excellent design, high performance of the unitplays an important supporting role in chip design. That is to say, without a set ofcomplete, high quality standard cell library, the level of integrated circuit design wouldnot be improved[4].Based on CSMC700V SOI technology files, this paper mainly describes thestandard cell library design process. We can start from two sides of the logiccombination unite and the timing unite, and pick up the reasonable extraction devicesize, and then complete some standard cell unit symbols, layout design and simulationwith the help of Cadence of Virtuoso layout drawing tool. After using the tools Hspiceand Calibre, we can ensure the design can meet the requirements, and then we use theSynopsys Liberty NCX to characteristic, and produce the library files. At the same time,this article also puts forward to the standard cell layout optimization method. Besides,we can find the proposed layout optimization method has more obvious advantages byHspice simulation comparison. In this paper, the main work and achievements include:1. This article introduces the whole design process and each step in the process ofconcrete operation of the standard cell library, and shows the operation results for eachstep. It specific includes the standard cell library design, the framework beforesimulation, circuit gallery, symbol library, the establishment of the gallery, parasiticparameter extraction, after the simulation and the generation of library files.2. This article puts forward a method of layout optimization, and this method canbe applied in the standard cells of more input ports or higher driving. What’s more, themore the number of input ports, the higher value this method would have.3. This article completes the layout drawing and simulation of all the inverterchains and inverter rings. For inverter chains, the mainly task is measuring the rise timeand fall time. For inverter rings, we focus on the oscillation frequency simulation test.