Low Power Design Of 40nm Standard Cell

With the rapid development of Internet technology and mobile Internet,the requirement of power consumption is more and more stringent.To meet the demand of low power consumption,low power design methods are gradually considered from the system level to standard cell library level.Standard cell library as a bridge connecting the IC design,has to face problems with low consumption.The expansion and optimization for low power is presented in this paper based on the standard cell library of SMIC 40 nm process.And then a standard cell library is designed for low power consumption.In this paper,we first introduce the source of power consumption of CMOS circuits and the common low power solutions.So the multi-voltage technology and clock gating technology are chosen as the low power design goals.In order to achieve the design goals,this paper selects three kinds of low power standard cell to join the standard cell library: clock gating cell,level shift cell and isolation cell.In the design of digital circuits,timing is the most concerned problem for designers.Therefore,this paper presents a low power design for trigger.The clock gating technique is applied to the design of trigger based on the design criteria of the standard cell library.The internal feedback signal is used to control the trigger in the case of the redundant clock hopping,so that the internal nodes can't be changed,so as to achieve the purpose of reducing power consumption.In addition to the improvement of logic design,this paper presents an improvement on the method of layout drawing.Thus,the short circuit current is reduced,and the power consumption is reduced.After that,the MBIST is designed on the basis of SMIC 40 nm process.At the same time,the logic synthesis of periphery is based on the low power standard cell library designed in this paper.Finally,the power consumption is analyzed by HSIM simulation.Compared to the MBIST based on the standard cell library of SMIC 40 nm process,at the same clock frequency,and test functions are correct,the power consumption are reduced,which proves the advantages of low power consumption standard cell library.