Design And Application Of Register File In A High Performance DSP

Register file is located in the processor core, and generally it is on the data path,the performance of high bad is directly related to the performance of the processor.High performance register file is badly needed, especially in some important applicationsituations. So there is a need for us to design a register file with high performance whichis a good combination of small area, high speed and low power.This registers file will be applied in a civilian processor, specification has beenmade depending on the processor structure, and research on full customer designtechnology of multi_port register has been done. The main tasks are listed as follows:Performance of the register file has been developed because of optimization ofstorage structures and circuits. Purpose of shortening the critical path has been reachedby arranging read operation, computing, write operation in different pipelines. Positiveclock skew has developed circuit performance. Two_level dynamic decoding structurereduces the decoding time by11.1%. To optimize the critical path and better the timing,we design directional pathway, and it does work.This design uses a variety of technologies, including the invert reading, multi_threshold technology, multi_stage decoding, clock gating, static and dynamictransformations to reduce power consumption. In the case of all reading ports areoutputting1as all ports are working, we get the maximum power consumption of thecircuit,52mw, the result is comparable with same size circuits.In layout design, some technologies, such as finger_folding, power and groundsharing, source and drain sharing, helps reduce19%on the area.This article also made research and implementation on the library building ofregister file, laying a solid foundation for cells library. This design uses Synopsys toolsLiberty NCX to complete library building, in the course, timing extraction, timing arcmeasurement, choice of sampling point, some technologies related to library buildingare introduced.A register file with10read ports,6write ports, directional path, size32×32bit,frequency600MHz, completing data writing and reading in a single cycle has beendesigned under65nm technology.