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The Study And Full Custom Implementation Of Register File

Posted on:2005-03-30Degree:MasterType:Thesis
Country:ChinaCandidate:L LiuFull Text:PDF
GTID:2168360155971827Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
An optimized design of register file is critical to the performance of microprocessor. In order to improve the performance and ILP (instruction level parallelism), large scale and multi-ported register file sources are often used in modern microprocessors. To design a high performance register file with full custom methodology is significant to improving the whole microprocessor's performance, reducing the die area, and decreasing the power dissipation.X microprocessor is a 64-bit high-performance general purpose microprocessor with fully independent intellectual property, wherein abundant multi-ported, large scale register file are designed to support multiple pipeline, multiple issue of instruction and the speculated prefetch of data, and therefore the parallelism of instruction execution are enhanced and the processor's performance of memory accessing are significantly improved.In this paper, the full custom design technology for register file is discussed, and combined with the real project- national 863 project plan— 'the Development of 64-bit High Performance General Purpose Microprocessor' , we designed and implemented a multi-ported, large scale, high performance general register file, verified the corectness of the design result, and generated an IP core which guarantee the reusability of the design.This paper contains the following content:1. Detailedly discussed the whole structure design, and then confirmed the whole schematic and layout structure;2. Thoroughly investigated the technology of how to optimize the schematic and circuit design of the register file, developed the shared write/read port, timing-sharing write/read control circuits, and optimized the storage cell design;3. Introduced the technology to implement the layout of the general register file, detailedly discussed the the routing sources, SI (signal integrality) and drive problem in implementing the layout. Based on the optimized physical placement, completed the layout design and verification with stuctural method, extracted the parasitics and resimulated the design;4. Generated IP core of the general register file, guaranteed its reusability.The design completed in this paper is directly used in the X microprocessor, which has significant practical meaning, and accumulated experiences in the technology and theory of full custom design.
Keywords/Search Tags:Register File, High-Performance CPU design, Multi-ported Read/Write Circuit, Shard wordline, IP design
PDF Full Text Request
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