Research And Design Of A Low-Noise Amplifier Based On RF CMOS Technology

With the development of the wireless communication technique, the product ofthe wireless communication is used widely over the world. As the core of the wholesystem, however, it becomes important to design high-performance, high-speed,low-power consumption communications chip. Accordingly, it is valuable to researchradio frequency circuit.As the key block of radio frequency receiver, the circuit of low-noise amplifier(LNA) located the first stage of the whole system. Its primary function is the firstamplification and filtering for the weak radio frequency signal from the antenna toobtain the radio frequency signal used in the bank-end circuits. Because the low-noiseamplifier is in the first stage, its noise figure, gain and linearity has the great influenceto the whole chip.In this thesis, the device characteristic of0.18μm CMOS process was introduced,and the parameter of low-noise amplifier was analyzed and researched firstly. Then,some kinds of low-noise amplifier were introduced. In the same time, as the basedstructure of the low-noise amplifier in this paper, the source inductive degenerationwas selected. Finally, a circuit of low-noise amplifier based on CMOS process isdesigned.In this paper, the designed circuit was simulated with the software SpectreRF inCadence. The results of the simulation shown the performance of the LNA circuit,which is based on the source inductive degeneration, met the goals. The LNA circuitcan provide gain of20dB with the noise figure of1.1dB, while the1dB compressionpoint is-17.1dB.According to character of the RFIC, the layout was designed with the softwareVirtuoso in Cadence. The area of whole layout is400μm×450μm. The chip putted inthis paper has been taped out under the TSMC0.18μm process line and proved to besuccessful.