Research Of CMOS Low-Noise Amplifier For Wireless Receivers

In recent years, Wireless Local Area Network (WLAN) is developed very fast in the world as office and home communication infrastructures. The fast growing demand for broadband wireless communications has caused an increase in the development of wireless receivers (for IEEE 802.11a).The radio frequency integrated circuits based on CMOS (Complementary Metal Oxide Semiconductor) process have more and more markets and prosperous future. And as an important block of wireless receivers, low noise amplifier has been paid more and more attention on. A LNA (Low-noise Amplifier) serving as the first amplification block in wireless receivers plays an important role in the receivers' total performance since its NF (Noise Figure) and gain contribute significantly to the overall Signal to Noise Ratio (SNR). So, it is an important goal to design well-performance LNA for wireless receivers. However, the research of LNA in our Country developed later compared with other Countries and there is still distance in some way. Thus, the research of this work is important and necessary. This work was supported by National Science Foundation of P. R. China.This thesis firstly introduces the principle of the traditional source inductive degeneration input impedance matching architecture, and then analyzes the advantages and disadvantages of this architecture. Through the analysis, holding its advantages and Based on the analysis of the limitation of traditional source inductive degeneration architecture, this paper makes improved design: to use a LC network instead of the large value gate inductor L_g, and remove the source degeneration inductor L_s at the same time. And then , based on 0.18μm BSIM3 model and the improved input impedance matching architecture is adopted, a wideband(5.1GHz-5.8GHz) CMOS low noise amplifier is deigned for the 802.11a wireless receiver application. Results by ADS show that gain of above l5dB, 2.75-3.65dB NF and P1dB of -10dBm with good stability within the frequency band interested (5.1-5.8 GHz) are obtained. Although the input impedance matching is a litter degraded due to the removal of the traditional source inductor L_s, it's in favor of lower noise figure (NF) and also smaller chip area. Besides, it is easier to realize small spiral inductor on standard CMOS process and this design can be well put into application of a wireless receiver whose frequency band is from 5.1GHz to 5.8GHz.