The Study And Design Of CMOS RF Low Noise Amplifier

In recent years, wireless communication technology is constantly evolving tomeet the different needs of industries. With the rapid development of CMOS processtechnology, its characteristics can be comparable to GaAs technology. So variouscountries IC design companies, universities and research institutes are all putting a lotof manpower and resources to the development of wireless communication systemsbased on CMOS technology. A low noise amplifier is always used in the RF receiverfront-end system and determines the overall performance of the receiving system,which requires a certain gain to amplify the weak signals received by the antennasystem and to suppress the noise level of the following circuits, lower noise figure andhigher linearity to handle the larger signal. The difficulty of low noise amplifierdesign lies in the need to compromise between these indicators. We designed a lownoise amplifier working at2.45GHz based on the0.18μm CMOS technology of Chrt.The main contents include the following aspects:Because of the special requirement of RF circuits in choosing devices, so in thispaper we introduce the characteristics of passive components in CMOS technology,giving the high frequency equivalent circuit model of the MOS transistor and itshigh-frequency parasitic characteristics in detail at first.Secondly, according to the noise characteristics of the low noise amplifier weintroduce the detailed noise theoretical analysis of the circuit design of the device，andthe noise figure calculation method of two-port network and cascaded system.Again, we analyze the circuit topologies detailed which are always used in thedesign of low noise amplifier and select the source inductance degenerate negativefeedback structure to complete the design of this circuit in my paper.Finally, we analyze the indicators that required in low noise amplifier, and give adetailed analysis of the noise-power optimization technology by power constraints.We introduce the source inductance degenerate negative feedback cascode structuredetailed following and give a detailed calculation of component parameters. At lastwe complete the simulation, layout and MPW of the circuit and finish the circuittesting and introduce some notes in the layout design and testing. The final results of simulating are that the gain is21dB and noise is1.65dB which can meet the systemdesign requirements well.