A Cmos Rf Low-noise Amplifier Design

With the development of wireless communication and the CMOS technology,uses the CMOS technology to implement the radio frequency integrated circuit to be able to achieve low cost,low power,high integration.This thesis designs an important module in RF front-end cicuit-low noise amplifier based on CMOS technology,and the low noise amplifier required to be the low noise and highly linear,the impedance matching,the low power dissipation.Because of the performance of the RF integrated circuits is strongly connected with the quality of passive elements,so the CMOS passive elements in TSMC 0.18um process are discussed in this thesis.Based on the noise components of MOSFET and its short-channel effect, the low noise amplifier noise performance has been analyzed systematically,both drain current noise and induced gate current noise are studied in detail.With the analysis of noise,the high frequency noise model of MOSFET is proposed,the contribution of different noise components of MOSFETs to the noise figure of the inductively source-degenerated low noise amplifier is calculated and the analytical expression of the noise figure is derived.Non-linear influences in low noise amplifier are also considered,based on the volterra series,the nonlinearity of common-source amplifier are analyzed systematically,and the restrict relations between the power consumption,the noise,the gain and the linearity in the low noise amplifier design are discovered.Several kinds of circuit structure are discussed in this thesis,and the advantages of inductively degenerate cascode topology are pointed out with the comparison of other circuit structures.Its noise performance are analyzed,a useful indication to the design tradeoffs associated with noise figure,power dissipation and gate overdrive voltage for the LNA design are proposed.Based on the above analysis,the thesis discusses noise figure optimization techniques for inductively degenerated cascade low noise amplifiers,the power-constrained noise optimization technique are discussed emphatically.Finally,the thesis presents a 2.45GHz single ended low noise amplifier using 0.18μm CMOS process for a Bluetooth LNA application,the amplifier provides a 2.375dB noise figure with a -8.48dBm third-order input intercept point,while drawing 9.8mW from 1.8V power supply,the result show that the theoretical analysis can accurately predict the noise performance of a low noise amplifier design.