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Design Of Differential CMOS Low Noise Amplifier

Posted on:2009-09-10Degree:MasterType:Thesis
Country:ChinaCandidate:X ChenFull Text:PDF
GTID:2178360272978565Subject:Communication and Information System
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Due to the rapid development in science and technology, the wireless communication system has potently shortened the connectivity among people. The dramatic progress of CMOS process technology has gradually evidenced its applications in RF front-end circuits. CMOS process possesses the advantage of low cost and highly integration. As the main part of the RF front-end receiver, the function of the low noise amplifier (LNA) is amplifying the faint signal which incepted from air by the antenna. It can reduce the noise jamming, so as to demodulate right information for the system. The noise performance of the LNA will affect the performance of the whole system directly, and then deciding the sensitivity and dynamic working scope of the receiver. In recent years, the rapid development of wireless radio system leads to an increasing demand of low noise, low power, low lost, high performance and high integration. In order to satisfy the requirement we designed a low noise amplifier (LNA) for 2.5GHz RF front-end receiver.Based on 0.18μm CMOS process and BSIM3v3 model and adopted a Tow-Input and Tow-Output structure, a 2.5GHz CMOS differential low noise amplifier is deigned for the wireless receiver application. This thesis firstly introduces the principle, configuration and advantage of the differential LNA, and then analyzes the current-reuse technology and disadvantages of the traditional structure, and an improved cascode LNA is presented, which adopts a combination of source-degenerated NMOS inverter to improve gain and noise figure. Meanwhile we proposed a parallel LC network instead of the large value gate inductor Lg . From the design standpoint, it economizes the power dissipation, reduces the noise figure and makes the optimization and integration of the stage easy.From the aspect of bias circuit, noise optimization, linear gain, impedance match, and the design methodology for LNA is analyzed, the effect of the source inductive, input matching capacitance and the component model of transistors on LNA is also discussed. Results by ADS show that gain of above 15.053dB, 1.41 ldB NF, the input reflection S11 is -50.68dB, the reverse transmitted coefficient S12 of -20.926dB and PldB of -1.39dBm with good stability are obtained. The LNA consumes about 5.2mA current under the supply voltage of 1.8V. This design can operate at 2.5GHz wireless receiver.
Keywords/Search Tags:Low noise amplifier (LNA), noise figure, input impedance matching, CMOS process
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