Eight Type Algorithm Research And Design Of Adc

Analog-to-digital/digital-to-analog converters is the bridge of the analog signal in the real-life world to digital signal, is a part of important component in analog chip. High-speed, high resolution and low-power ADC in standard CMOS process is more and more attention.The work of this thesis is the design and complement of an8-bit algorithm ADC of5Msps conversion speed. The thesis complete the following aspects of work from the overall circuit structure to circuit design:gives an algorithm structure design of ADC, intoduce and analyze the principle of algorithm structure. The design uses a single-stage and cyclic structure, and the redundancy correction method for digital correction. Analyze non-ideal factor of the circuit, and propose the method to reduce these non-ideal factors. The sub-module circuit analyze the sample and hold circuit, the margin gain amplify circuit, one-stage folded-cascode full differential op amp, two-stage amplifier with Miller compensation circuit, the dynamic comparator circuit and clock generation circuit design.The design perform the circuit simulation using spectre tool of cadence software, while also carry out layout optimization. The overall circuit simulation can achieve the signal to noise ratio of50.4dB and the effective bit of7.97, the power consumption is less than6mW.