Design Of A Low Power Consumption Double Integral Analog-digital Converter

With rapid development of integrated circuit in the field of microelectronics, application in the reality of digital computing and digital processing circuit becomes more and more widely. No matter in the design of high-tech instrument, radio communication field, all kinds of imaging circuit, analog to digital converter(Analog to digital converter also called: ADC) is one of the most important part, and its performance will have the most direct impact on the circuit design. Therefore, we can base on the different actual applications to choose ADC.At first, this thesis introduces the ADC in the modern technology development status, position function and its development prospect. Secondly, according to the need of pressure measurement and bearing instruments for analog-digital converter, this thesis compare the difference between performance and the cost of several analog-digital conversion to choose the double integral ADC with high precision, low speed and low power consumption. Once more, this thesis introduces its work principle about the analog to digital converter, circuit structure and the advantages to the different performance. Finally, design and simulate the double integral ADC circuit and get the final design parameters. And for the study of double integral ADC, we need to understand its working principle, analyze the characteristics of the system structure, to compare with its non ideal characteristics. In this thesis, we divided the double integral ADC into several important sub modules: sample and hold circuit, an integrator, a comparator, a counter, band gap reference and other parts, and carry on the simulation in the circuit design of each part of the circuit design, in order to analyze whether circuit design meets the design requirements of the index. Then, we carry on the overall simulation for the design circuit to see the errors according to compare with the ideal converter, and find out the reason of those errors. The double integral ADC designed in this thesis has following characteristics:(1) in the integrator we introduce one of the automatic zero-adjustment circuit, that can effectively offset the imbalance phenomenon which would be caused in the process of production;(2) When design the comparator circuit, we use the hysteretic comparator circuit to reduce the influence of noise on the output of the comparator;(3) by optimizing the circuit design, the double integral analog-digital converter circuit designed in this thesis is very low.Double integral ADC index was designed in this paper is based on ICL7109 is: the precision is 12 bit, the sampling rate is 9K, the input voltage range is 0~5 V, the power consumption is 10 m W. This thesis based on based on Chrt 0.35 um CMOS process, through the simulation we know the ADC SNR is 70.98, effective number of bits is 11.5 bit, sampling rate is 10 K, input voltage range is 0~ 5 V, power consumption is 1.12 m W, which is in line with the design requirements.