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Research On Co-design Of Low-power Instrumentation Amplifier And Analog-to-digital Converter

Posted on:2022-06-10Degree:MasterType:Thesis
Country:ChinaCandidate:J F GaoFull Text:PDF
GTID:2518306524477464Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of the electronic information industry,wearable medical and healthcare equipment has gradually entered people's daily lives.In order to bring people a better user experience,wearable medical and healthcare devices are developing in multiple directions such as small size,low power consumption,and high accuracy.But it also brings huge challenges to the design of the bioelectric signal acquisition system.Instrumentation amplifiers and analog-to-digital converters are important parts of the bioelectric signal acquisition system,and their performance will have a direct impact on system performance.This thesis mainly focuses on low-power high-performance instrumentation amplifiers and analog-to-digital converters.The specific design schemes and simulation results of instrumentation amplifiers and analog-to-digital converters are introduced respectively.In the design of the instrumentation amplifier,considering that the instrumentation amplifier is at the forefront of the system and is susceptible to external interference,the common-mode replication technology is adopted in this design,which significantly improves the common-mode input impedance and common-mode rejection ratio.In this way,the instrumentation amplifier has a strong anti-interference ability.In order to achieve higher common-mode replication accuracy,a floating bias circuit is used to shield the common-mode parasitic capacitance of the input transistor of the operational amplifier.The second-stage amplifier uses chopping technology to further improve the commonmode rejection ratio of the instrumentation amplifier.The whole circuit is realized under standard CMOS 180 nm process,with 46?64 d B adjustable gain,common-mode rejection ratio is higher than 140 d B in the frequency range of 8?200 Hz,and the input rms noise voltage in the frequency range of 1 Hz?7.6 k Hz is 4.44 ?V.Under the power supply voltage of 1.8 V,the current consumption is 1.86 ?A and the power consumption is 3.35?W.In the design of the analog-to-digital converter,considering the power consumption overhead,the successive approximation register structure analog-to-digital converter is adopted.The capacitor array is designed based on the split capacitor flip method.The level shift function is added,which can transfer the differential-mode signal from a high common-mode level to a low common-mode level without affecting the linearity of the signal,and complete the quantization of the input signal under a low power supply voltage,thereby saving a lot of power consumption.By properly adjusting the timing,a capacitor array reset method suitable for detecting bioelectric signals is realized,which effectively reduces the demand for driving current of the analog-to-digital converter.The comparator adopts a three-stage structure design to further reduce the noise of the comparator.The whole circuit is realized under the standard CMOS 180 nm process,the sampling frequency is 10 k Hz,the power supply voltage is 0.6 V,the power consumption is 79.4n W,and the effective number of bits is 10.02 bits.
Keywords/Search Tags:low power consumption, instrumentation amplifier, analog-to-digital converter, effective number of bits
PDF Full Text Request
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