Ldpc Decoding Using Dynamic Quantitative Method And Decoder Design

Hardware complexity of decoders, which is caused by storage and processing of massive information, is the major reason that encumbers LDPC codes from widely application. Reducing the quantization word length of decoding information can effectively decrease the hardware complexity. For the absolute value of information keeps increasing during decoding, short word length with finite quantization ranges will lead to serious saturation errors, which damages decoding performance. By gradually reducing the quantization precision, the quantization range can be expanded to meet the demand of changing of information. Furthermore, to fill an omission of decoders using this algorithm, this paper proposed a new architecture of LDPC decoders. It is based on the traditional partial-parallel architecture, but can change the quantization scheme of decoding information. It also concludes circuits used to static the percentage of the value of information closing to saturation, which helps to adjust the quantization scheme of information in a self-adaptive way. Results show that our work can achieve the goal of the algorithm mentioned above perfectly, so the hardware complexity of LDPC decoders is greatly reduced.