Test Data Compression Based On Blocks' Compatibility Of Responses And Group-Frequency Encoding

Along with higher integration of intellectual property (IP) cores and more complexity of system, the volume of test data and the testing time for SoCs are growing rapidly, which make the cost of test increasing. At the same time, the channel capacity, speed and the data memory of automatic test equipment (ATE) are severely limited, and can't satisfy the test, and all these make the test challenges increased. One of the challenges is how to decrease the volume of test data. The research has been paid more attention by many academies, electronic design automatic companies and integrated circuits manufacturers.Test data compression of SoC is studied in the thesis, which reduces the transferring test data and the test application time effectively, and can ease up the contradiction between the great number of test data and the limited bandwidth of the test equipment. At first, the dissertation introduces some related concepts in the test of digital system and the challenges to the SoC test, and then introduces the methods of test data compression and their application in industry.A test data compression method called as Group-Frequency Golomb coding is presented. When coding with the Golomb codes, the prefix codes are rebuild to take advantage of the run lengths' uniformity in the test set, so that the codes in Golomb code can be more efficiently. Experimental results indicate that, the proposed method can improve the compression ratio of Golomb codes efficiently.For the purpose to overcome the disadvantage of reseeding methods such as the high hardware overhead, the complex computation and etc, a test data compression scheme based on blocks' compatibility between responses and test vectors is presented in this dissertation. The research shows that the size of LFSR seed depends on the maximal number of specified bits in test patterns. The more specified bits a test pattern has, the more difficultly it is encoded as LFSR seed. In the scheme, the don't care bits in test vectors can be increased by using the blocks' compatibility between responses and test vectors, and the length of encoding LFSR is reduced, and the additional test vectors aren't needed, so that the test set can be compressed. The decompression structure needs only a LFSR and a simple control circuit. Experimental results indicate that, the proposed scheme provides higher ratio of test data compression than the other test data compression strategies such as the syncopation method, the hybrid coding strategy, and the FDR coding, with little hardware overhead.