Analysis Of Noise And Nonlinearity In CMOS Low Noise Amplifiers And Mixers

In this thesis,the noise and nonlinearity performance of CMOS low noise amplifiers (LNA) and Gilbert mixers are studied systematically.It is shown that neglecting the gate-drain capacitance of the MOSFET would lead to an overestimation of the optimum device width in the CMOS source degenerated LNA. By taking the capacitance into consideration,we show new noise figure optimization methods for CMOS cascode LNAs.Based on the Volterra series,expressions describing the third-order intermodulation distortion in CMOS cascode LNAs are derived. The theoretical analysis is verified by simulation results. We also compare our results with those in the literature. The impact of the cascode transistor on the noise and linearity performance of the CMOS LNA is discussed in detail. Techniques for optimizing the cascode transistor are proposed.A fast algorithm for estimating the high-frequency conversion gain of CMOS Gilbert mixers is proposed. It is shown that the excessive local oscillator drive deteriorates the conversion gain of the mixer at high frequencies,a trend not shown in the low frequency approximation. Simulation results are given to verify the analysis. The impact of the size of the switching transistors on the conversion gain is also discussed.By solving the stochastic differential equations describing the noise performance of the CMOS Gilbert mixer,the time-varying power spectral density of its output noise at high frequencies is given. It is shown that,similar to the low frequency approximation,the more ideal the switching pair commutates currents,the less the switching pair contributes to the overall output noise.An overview of the intermodulation distortion analysis of CMOS Gilbert mixers is presented. The main difficulties in performing the nonlinearity analysis in mixers are discussed in detail. The design flow and optimization techniques for CMOS Gilbert mixers are given on a qualitative basis.