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Design And Implementation Of A 2.4GHz Low Noise Amplifier In 0.18μm CMOS

Posted on:2010-07-03Degree:MasterType:Thesis
Country:ChinaCandidate:B HuangFull Text:PDF
GTID:2178360278956800Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Recent years, the wireless communication technique has great development, which leads to high requirement for its RF module. With the progress of the CMOS process, the CMOS RF process can compare with the traditional RF process like Bipolar, GaAs and so on. Furthermore, CMOS process has the advantage at integration. All of these determine the present popular research at high performance RF module focusing on CMOS process. As the first stage of the RF module of the receiver, Low Noise Amplifier (LNA) determines the whole receiver's performance. To improve the sensitivity and dynamic range of receiver, LNA has to satisfy these demands: low noise, appropriate power gain, good linearity and impedance matching. At the same time, LNA also has to consider power consumption to meet the desire of portability. The design of LNA is the compromise of these parameters and optimization of the entire performance.This thesis focuses on the design of 2.4GHz CMOS LNA which meets the requirement of IEEE 802.11b standard. This paper starts with the research of device characteristic of 0.18μm CMOS process, and discusses some normal devices'characteristics at high frequency. Basing on this we analyze the noise models of these devices, giving the method to optimize the noise performance under power consumption and impedance matching conditions. For the design of high quality factor inductor is important to design a good performance LNA, we analyze the structure and model of integrated planar spiral inductor of 0.18μm CMOS process, and get the quality factor and the value of the inductor with the help of ASITIC tools, which of these are significant for the design of on-chip planar spiral inductors.This thesis fulfills the schematic and layout design of 0.18μm CMOS LNA, using ADS for simulation. The results of simulation are: IIP3=-6dBm, NF=1.94dB, S1 1=-32dB, S1 2=-39dB, S 21=19dB, S 22=-22dB, Power=12.6mW. The result of simulation shows that the LNA design of this paper has good performance, satisfying the requirement of IEEE 802.11b standard and is turned out to be a successful design.
Keywords/Search Tags:COMS Low Noise Amplifier, Planar Spiral Inductor, Noise Figure, ADS Simulation Software
PDF Full Text Request
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