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Cpci Bus-based Intermediate Frequency Signal Processing Module Design

Posted on:2009-03-13Degree:MasterType:Thesis
Country:ChinaCandidate:S J HuangFull Text:PDF
GTID:2208360245460798Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
As one of the most important modern technology, data acquisition has been widely used in a lot of fields as telecommunication, spaceflight & voyage, remote sensing, biology medicine, military affairs and information security. Specially, the signal process with high rate high resolution has far-reaching effect on promoting the development of technology in related areas. With the development of electronic technology, computer science as well as its corresponding application in electronic measurement and instrument domain, the emerging of newly measurement theory & method, newly measurement instrument, the function of electronic measurement instrument has changed a lot. This paper focus on the introduction of the hardware design based on CPCI Bus as well as the working mechanism of the whole system and related issues, two kernel parts are covered in:1. The hardware design. In this part , the middle frequency signal process module are made up of analog channel , AD conversion, DDR SDRAM circuit, CPCI interface circuit and Power, the design of the corresponding part are detailed introduced. The hardware design of the module is in accordance with CPCI electric standard, so it is compatible1 with other CPCI module which has different function , they can work on the same platform at one time2. The working mechanism design of the whole the middle frequency signal process module. In this design, FPGA is used as digital logical control apparatus, the development of its inner logical is based on Verilog language, the control of all separated circuit, the communication of each module, and the interface is exactly realized by the FPGA inner logic. Considering the performance and compatibility of the module, a local Bus controller based on FPGA is designed later, which can finally fulfill the high speed transmission between PCI9054 and PC.
Keywords/Search Tags:DDR SDRAM, CPCI Bus, FPGA, Data Acquisition, Middle Frequency Signal
PDF Full Text Request
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