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Based On The Design And Realization Of Mass Storage Board Cpci

Posted on:2010-08-11Degree:MasterType:Thesis
Country:ChinaCandidate:S ZhaoFull Text:PDF
GTID:2208360275483967Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Given the high computation and throughput of radar signal processing, there is a higher requirement for the speed of in-out and the ability of processing. The purpose of the project which I undertake is to design a real-time radar signal processing platform based on CPCI (Compact PCI) chassis. The content of this paper is to design and realize a mass memory card in the platform, which can store massive data and transmit data to other boards in a high speed.First of all, this paper introduces the development of radar signal processing, and gives a brief description of mass memory storage technology, optical fiber transmission technology and the development of FPGA.Secondly, this paper designs the scheme of mass memory card. In order to transfer data in a high speed, DDR2 DIMMs (Double Data Rate 2 Dual In-line Memory Module) are selected as the memory devices. In order to determine the bus structure of DDR2 DIMM, HyperLynx software of Mentor is used to simulate the bus structure. According to the simulation results, two buses are adopted, each contains two DDR2 DIMMs, so the biggest memory capacity is 16GB. Link Port interface is used to transmit data to the next board, which can be configured as 8 channels, and each channel's highest speed is 150MB/s. There are two fiber interfaces on the card, each one's speed can reach 3.75Gb/s, which can serve as auxiliary transmission channel. At the same time, paper give a brief introduction about the manufacture of FPGA, after careful comparison, a FPGA of Xilinx XC5VLX50T is used as the master chip.Then, this paper designs the schematic and PCB of this card. There are five parts, power, FPGA, DDR2, optical fiber and Link Port, and some key points are given in detail. PADS2007 is used to design the PCB and some layout rules about DDR2 and Link Port interface are described.Finally, this paper debugs the hardware and designs the interface programme. The description about power and FPGA basic circuit is concise, and DDR2 interface, optical fiber interface, PCI interface, and Link Port interface are described in detail. Test results under certain test condition are given. This paper designs and realizes a CPCI card which can store mass data and transmit data to next board rapidly. This card can communicate with PC by the PCI bus, cooperate with some software in operate system and the processing card, can constitute a radar signal processing platform.
Keywords/Search Tags:FPGA, DDR2 SDRAM, Fiber, Link Port, CPCI
PDF Full Text Request
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