Charge Pump Pll Basic Research

Phase-Locked Loops have become ubiquitous in modern communications systemsbecause of their remarkable versatility. As one important example, a PLL may be usedto generate an output signal whose frequency is a programmable, rational multiple ofa fixed input frequency. The output of such frequency synthesizers may be used as thelocal oscillator signal in RF transceivers. Phased-Locked Loops may be used toperform frequency modulation and demodulation, as well as to regenerate the carrierfrom an input signal in which the carrier has been suppressed. In broadband datacommunications systems and optic fiber communications systems, phased-lockedloops recovery clock signals from the input NRZ data and retime the data. Theirversatility extends to purely digital systems as well, where phased-locked loops areindispensable in skew compensation and the generation of clock signals.Firstly, the developments and applications of phased-locked loops are reviewedbriefly, and then the importance of charge-pump phased-locked loops is discussed.Due to the special requirements of differential applications, the integer-Narchitectures, fractional-N architectures, sigma delta fractional-N frequencysynthesizers and clock and data recovery circuits are derived.Frequency phase detector, Hogge phase detector, Alexander phase detector,modulus 2 dynamic frequency divider, multi-modulus frequency divider, charge pump,differential charge pump, passive loop filters, voltage control oscillator andoperational amplifier are designed. Phase jitter of differential delay cells and outputsignal of VCO is discussed in detail.In order to quantitatively analyze charge-pump phased locked loops, a mathematicmodel must be established. Though detailed analysis of charge-pump phase-lockedloops, charge-pump phase-locked loops are considered as nonlinear discrete-timesystems. A linearized continuous phase domain transfer function model is used tomodel narrowband charge-pump phase-locked loops when it is in phase-locked states.The phase noise model of PLLs is also established and quantitative noise of sigmadelta fractional-N frequency synthesizers is analyzed.Lastly, charge-pump phase-locked loops are designed at the transfer function leveland a trade off between the loop bandwidth and the stability of PLLs is made, a tradeoff between the phase margin and the settling time of PLLs is also made. At the same...