An 8-bit Precision, Low-power Dac Design

The purpose of this project is to realize a design of an 8-bit high accuracy, low power digital-analog converter (DAC). In this paper, the performance parameters of DAC are introduced firstly, such as settling-time, linearity precision, power, etc. These parameters are the gist and goal of structure selection and circuit design. Secondly the mode of input and output is confirmed to be parallel-input and complementary current-output, which is adapt to the requirement of quickly data-convert with high accuracy and low power. After comparing with many structure of DAC, the segmented inverted R-2R ladder architecture is decided, which can help DAC to get high speed and high accuracy and the area of the circuit is smaller. NMOS is used as current switch, which has faster speed compare with PMOS and has high current drive capability and gm. The CMOS technology is better than bipolar technology. Thus the N sub P well CMOS technology is be used, which help the circuit get lower power. The DAC consists of analog circuit blocks (inverted R-2R ladder architecture and current switch) and digital circuit blocks (control and data-latch). So it's a mixed signal circuit. Because the digital part's design is strict and its structure is simple comparatively, we use the same method as analog part to design it. And the Hspice is used for DAC circuit simulation. The layout of the circuit is designed and drawn with the tool of Cadence. Finally, the 8 Bit DAC is finished. Its settling-time is 28ns with 5V supply, DNL is ±0.28LSB and INL is 0.15LSB, power is lower than 10mW. The data achieve the target of the design, and the circuit has good capability and applied value.