A Full Feedforward Multi-bit Delta-Sigma Modulator Design For UHF RFID Reader Chips

Different from Nyquist-Rate ADC, Delta-Sigma ADC has played an important role in many field because it does not require precise passive component match. Based on 0.18μm CMOS process, this work presented a switched-capacitor Delta-Sigma modulator according to the specification of UHF RFID reader tranceiver. The obtained results are as follows:1. In the basic theory, a detail analysis of the work theory of Delta-Sigma Modulator based on the linear model and three basic topologies is presented. Furthermore, this work analysis the stability of Delta-Sigma modulator based on a nonlinear model and the requirement on the sampling clock.2. In system level design, this work presented a single-loop third-order four bit Delta-Sigma modulator. The loop filter is implemented by full feedforward topology. Its advantage over traditional feedback topology is proved by behavioral simulation: The output swing of each integrator fall in 10% of the reference voltage, which greatly releases the requirement on the operational amplifier. Furthermore, the problem of nonidealtity multibit feedback DAC is solved by DWA. Finally, we determined the specification of building block circuits by behavioral simulations.3. In the circuit level, this work proposed a closed-loop active summation circuit, which makes the modulator can handle larger input signal(-1dBFS). Because of closed-loop topology, the proposed summation circuit is more robust to process variation compared to the open-loop summation circuits. We also analysis the relationship between the nonideality of the proposed summation circuit and the performance of the modulator Qualitatively. The analysis resultes guide the choose of topology of the operational amplifier in the active summation circuit.4. We have finished both transistor level and layout design of the analog circuits in the Delta-Sigma Modulator. The simulation result shows that the effective number of bit of proposed design in 1.5MHz signal bandwidth is more than 12, when the modulator is clocked at 48MHz, while consuming 5mA from 3.3V supply voltage.This project is supported by the National Natural Science Foundation of China(Grant No.61306034&61302005)...