A Four-order Full Feedforward Sigma Delta ADC

The sigma-delta ADC designed in this thesis is mainly applied to the device of voice frequency. I adopt a Four-order Feedforward sigma-delta modulator architecture. With low voltage supplied, the modulator is realized with full-differential swiched-capacitor. The details include the basic principle of sigma-delta ADC, the analysis of different kinds of structure and the harmful factors that affect the SNR of the sigma-delta ADC, such as the finite gain, finite frequency, finite output swing of the operation amplifier, various kinds of noise and the mismatching of capacitance. It also includes the modeling of the modulator and the digital filter in matlab. By using the GSMC 0.18 um CMOS technology, sub-model circuits, including the operation amplifier, swiched-capacitor integrator, adder, comparator, bandgap and nonoverlap clock are designed, all of the circuits are simulated in the cadence. At last, I design the layout of sigma-delta modulator.Compared to the traditional structure, it reduces the sensitivity of the system that depends on the components, especially the integrators, making the inner signal smaller, lower the index of operation amplifier, enhance the amplitude and frequency of the signal. Because of that, this structure can be applied to low voltage environment.In the high order sigma-delta modulator, we must consider the stability of the system. However, there are no certain ways to restrain this. We should do much work in the modeling and simulating in matlab to make it stable. At the same time, we also want the highest SNR on the base of stability.Expect for the sigma-delta modulator, digital filter is another important part of sigma-delta ADC. The speed and accuracy are determined by the modulator and the power consumption and the area are determined by the filter. It is important to avoid the use of multiplier to lower the consumption. The filter designed in this paper consists of Cascaded-Integrated-Comb filter and two stage halfband filter.Simulated in the cadence, When the Sampling frequency is 12.8MHz, the oversampling is 128, the input amplitude is 0.38 V, the input frequency is 40 kHz, the SNR is reach to 93.9 dB.