Design Of 16-bit 3-order Delta Sigma ADC With Feedforward Structure

In recent years, delta sigma modulator based analog to digital converter (ADC) is the state of the art for designing ADC. Delta sigma ADC is made up of delta sigma modulator and decimation filter, modulator employs over-sampling and noise shaping techniques, and decimation filter filters out the out-band high frequency shaping noise and transforms the single-bit modulator output data stream having a high sampling ratio into multi-bits data stream at a Nyquist rate. Delta sigma ADC has the advantages of high resolution, high linearity, insensitive to analog device mismatch,high compatibility with digital CMOS integrated circuits, thus is widely used.Aiming at designing a delta sigma ADC for detecting the remaining current in battery operated systems and other low frequency applications, a delta sigma ADC with feedforward topology is presented in this paper, digital output code employs 16-bits complementary code format.For the designed delta sigma ADC, delta sigma modulator utilizes third-order, single-loop topology, single-bit quantization output. By adopting feedforward architecture, the loop stability can be improved, the output swing of integrators can be suppressed significantly, thus relax the amplifier circuit requirement and improve the linearity. High stability and optimum SNR are obtained by zeros and poles optimization techniques in the delta sigma modulator. Modulator is realized with full-differential switched-capacitor with a clock frequency of 256KHz, a signal bandwidth of 1KHz, and a over-sampling ratio of 128. Decimation filter is implemented with a fourth-order comb filter with a decimation ratio of 128.Using SMIC 0.18μm CMOS technology, sub-model circuits are designed, including integrators, amplifiers, adder, comparator, bandgap and bias circuits, two non-overlapping clock, oscillation detection circuit; moreover, the layouts of circuits are finished. In the mean time, the synthesizing, placing and routing of digital filter are completed, thus achieving the whole layout of delta sigma ADC.Delta sigma ADC is fabricated in Semiconductor Manufacturing International Corporation, employing 0.18μm CMOS technology. The testbench for the die is created, and the basis parameters test of delta sigma ADC is done. The test result demonstrates that the system shows an offset error, but the linearity is quite well.