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The Study And Design Of Video Image Enlarge Processing System Based On FPGA Technology

Posted on:2010-10-16Degree:MasterType:Thesis
Country:ChinaCandidate:L WangFull Text:PDF
GTID:2178360308479524Subject:Detection Technology and Automation
Abstract/Summary:PDF Full Text Request
Image enlargement, as one of the basic image processing operations, has been widely applied in image processing and image display in the domain of consumer electronics, medical, remote sensing and so on. Although it can achieve various image zoom arithmetic and can get high quality image, it is difficult to ensure its real-time processing to achieve large amount of data in video image processing by Software. Thus using hardware to achieve the enlargement of video images has become an important topic in research. Along with FPGA technology progressing by leaps and bounds, FPGA also gradually enters the digital signal processing domain. As a result of it admirable parallel processing ability, FPGA is widely uesd in real-time image processing domain.The blue print of the video image amplifying system which is based on the FPGA is presented in this paper. The overall framework of a video image processing system according to the process of video signal was constructed, and the specific scheme for the algorithm hardware implementation based on the characteristics of image interpolation algorithm is proposed. Next, the design focuses on the I2C bus control module, the digital video decoder module, the core image processing module, memory control block, as well as digital video encoder module, and using the VHDL language together with top-to-down method to finish their design and simulation. Finally, the direction of the improvement on the video image amplifying process system presents in this paper.The key of the design is the framework construction for the algorithm as well as the design to achieve algorithm by hardware. First, disassemble the two-dimensions to one-dimension inorder to simplify the system. Second, design one-dimension carefully to construct a frame that is more compact and fast. Finally, transplant the formula of the arithmetic to the hardware platform triumphantly. At the same time, a way to assistant simulation of the testing process by TEXTIO and MATLAB was proposed at the end of the paper.
Keywords/Search Tags:video image processing, FPGA, interpolation algorithm, VHDL
PDF Full Text Request
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