Efficient Image Enhancement Processing Algorithms Implemented On FPGA For License Plates Detection

This thesis is consisted of three main parts; the displaying an analog composite video input by through converting to digital VGA format, license plate localization on a video image and image enhancement on FPGA. Analog composite video input, either PAL or NTSC is decoded on a video decoder board; then on FPGA, video data is converted from4:2:2YCbCr format to RGB. To display RGB data on the screen, line doubling de-interlacing algorithm is used since it is efficient considering computational complexity and timing. When taking timing efficiency into account, image enhancement is applied only to beneficial part of the image. In this thesis work, beneficial part of the image is considered as numbered plates. Before image enhancement process, the location of the plate on the image must be found.In order to find the location of plate, a successful method, edge finding is used. It is based on the idea that the plate is found on the rows, where the brightness variation is largest. Because of its fast execution, band-pass filtering with finite response (FIR) is used for highlighting the high contrast areas. Image enhancement with rank order filter method is chosen to remove the noise on the image. Median filter, a rank order filter, is designed and simulated. To improve image quality while reducing the process time, the filter is applied only to the part of the image where the plate is. Design and simulation is done using hardware design language VHDL.Implementations of the chosen approaches are done on MATLAB and Xilinx Virtex-2Pro FPGA. Improvement of the implementation considering speed and area is evaluated.