The Study Of Real-Time Image Processing And Implementation With FPGA

With the further investigation and extensive applications of fruit picking robot, how to improve the picking speed has becoming an important issue at present. As the important application technology of the visual detection system of fruit picking robot, real-time image processing technology becomes the studied-focus. For the problems that most image processing algorithms are realized by software based on the PC, it is slow to deal with and has limited of applicable scope. This thesis regards FPGA as the platform, on the basis of analyzing the real-time image processing algorithms, through improving algorithms and optimizing the structure, under the terms of utilizing hardware resources rationally, the inherent parallel of the algorithms is excavated effectively. The processing speeds of the top image processing module is improved using the pipelining technology and the modularization design thinking, this provides technical sustain for designing quicker fruit picking robot. The major research contents and conclusions of the thesis are as follows:(1) It is analyzed that the exploitation flow,the design rule of FPGA and the implementation way of image processing with FPGA.(2) The implementation way is studied that the median filter,morphological operators,convolution operation and Sobel operator are implemented in VHDL.(3) In the design of median filter, improved algorithm called fast median filter is given, when the compositor is improved and three-point comparator is designed, and the median filter is implemented using the rule of"repeated-utilization module", this new algorithm can save more resources of FPGA and the speed is accelerated.(4) In the design of morphological operators, two improved algorithms of maximum filter and minimum filter are given based on ordinal filter, both will use less hardware resources used for these two algorithms and fit to the pipeline structure, so the time of dealing with an image is shorter.(5) To the characteristic of convolution operation, an altitudinal optimized algorithm is given. Firstly, it switches convolution coefficient to an integer, and then it simplifies the equation using sparseness of the coefficient, finally multiplication is avoided and leaving addition,subtraction and shift operation, and it is successfully applied to Sobel operator, the complexity of the operation is greatly lighten.(6) On the Max plus II of Altera Corp. and Modelsim, the emulational result indicates that the design of image processing algorithm based on FPGA can not only achieve a good processed result and get a high frequency, but also it can give a better performance of speed than using software and meets the requirement of real-time image processing.This thesis investigates the design technologies of specific chip for image processing using FPGA and provides preliminary study for the visual detection system based on FPGA.