Research On Bist Of SoC Through Dividing Test Cubes By Equal Number Of Specified Bits

With the rapid development of VLSI manufacturing craft, more and more transistors can be packed into a single chip. The original design mode of integrated circuit has changed from vertical mode to horizontal mode. Due to integrating various IP cores into a chip, the function of SoC is becoming more powerful. The design of SoC shortens the design cycle of integrated circuit and reduces the design risk, but it also brings a rapid increase in test data volume and test application time. So the testing of SoC is facing enormous challenges. The method of BIST is a good solution to solve these problems.Compared with conventional external testing methods, the method of BIST moves all test resources into a chip. By establishing generation of test patterns, imposition of test patterns, analysis of test responses and control architectures of testing, BIST eliminates completely the need for expensive ATE. In view of the LFSR reseeding method is widely used by industry areas as a BIST, this dissertation focuses on the problems of test data compression based LFSR reseeding.In this dissertation, several typical schemes for improving the encoding efficiency of the basic LFSR reseeding method at home and abroad are analyzed. And at the same time, the test patterns of partial ISCAS-89 benchmarks are researched. The results show that the size of LFSR seed depends on the maximal number of specified bits in test patterns. Therefore, a novel scheme of LFSR reseeding based on dividing test cubes by equal number of specified bits is presented. In this scheme, all of test patterns are concatenated to a data flow by a particular order. The data flow is divided by equal number of specified bits into new test patterns, and then these new test patterns are encoded by LFSR. Thus the proposed scheme reaches the aim of increasing the encoding efficiency. This dissertation also deduces the Markov chains theoretical model of the proposed scheme and the Pareto-Optimal theoretical model of reference value S. The experimental results for test patterns of partial ISCAS-89 benchmarks show that the proposed scheme has a better compression ratio than similar schemes. Its decompression architecture and transmission protocol are very simple.